1. Field of the Invention
The present invention relates to an arrangement for the bit-wise synchronous demultiplexing of a time division multiplex (TDM) signals in frame code words which occur as blocks.
2. Description of the Prior Art
Arrangements of the general type set forth above are known from the publication "Telecom Report", 2, 1979, special issue digital transmission, pp. 59-64, for a bit rate of up to 139 Mbit/s.
Heretofore series-parallel conversion has been carried out by shift registers in such a manner that the items of data are input consecutively into the shift register and read in parallel at times which represent a whole multiple of the input clock pulse rate. A demultiplexer which can be used in a practical manner is described in the German Pat. No. 28 56 565. Since the data recognition time (set-up and hold time) of the storage elements used must be sufficiently short in relation to the bit length of the serial TDM signal which is to be distributed, high-speed flip-flops exhibiting a correspondingly high power loss are required for a bit sequence of, for example, 565 Mbit/s.
As may be appreciated from the aforementioned publication, the synchronization has been carried out at the input of the demultiplexer. However, speed-related difficulties occur when the bit sequence of the TDM signal amounts to 565 Mbit/s.